(1) Field of the Invention
The present invention relates to a process for the preparation of semiconductor devices. More particularly, the invention relates to a process for forming p-n junctions according to the diffusion method.
(2) Description of the Prior Art
Various methods have heretofore been proposed for diffusion of impurities. Among them, from the viewpoints of prevention of contamination of the surface of a semiconductor substrate and control of the concentration of impurities, solid-to-solid diffusion methods are excellent, and of the solid-to-solid diffusion methods, a method in which a polycrystalline or amorphous semiconductor film containing therein impurities to be diffused is formed on the substrate and this film is used as a diffusion source (hereinafter referred to as "doped polysemiconductor method") is especially preferred from the viewpoints of protection of the surface of the semiconductor substrate and prevention of breakdown of a shallow diffusion junction at the high temperature heat treatment for formation of electrodes, because the polycrystalline or amorphous semiconductor film can be left after completion of the diffusion and metal electrodes can be formed on this film.
An instance of application of the doped polysemiconductor method to the preparation of semiconductor devices is illustrated in the specification on U.S. Pat. No. 3,460,007 to J. H. Scott, Jr. In this specification, there is disclosed a process in which boron is selectively diffused from the gas phase into a single crystal semiconductor substrate of the n-type to form a p-type semiconductor region, the semiconductor substrate is heated at a predetermined temperature of 580.degree. to 700.degree. C. in a nitrogen gas atmosphere in a furnace, a conductivity type-converting member which is phosphorus in this case, and silane is introduced into the furnace and by thermal decomposition of the silane at said predermined temperature, an n-type polycrystal silicon layer is deposited on the p-type semiconductor region. In this specification, there also is disclosed a process for formation on n-p-n type transistors in which the above semiconductor substrate is further heated to form in the p-type semiconductor region an n-type semiconductor region forming a p-n junction between this region and the p-type semiconductor region by diffusion of phosphorus from the n-type polycrystalline silicon layer, and electrodes are formed on the n-type semiconductor substrate, the exposed area of the p-type single crystal semiconductor region and the surface of the n-type polycrystal silicon layer, respectively. This process is characterized in that the semiconductor substrate is heated at a predetermined temperature sufficient to cause thermal decomposition of silane and then silane and a phosphorus compound are fed onto the semiconductor substrate. In this process, however, any particular attention is not paid at all to the reproducibility of the distribution of the concentration of impurities or the step like distribation of impurities of the p-n junction.
Japanese Patent Application Laid-Open Specification No. 13572/76 discloses a process for the preparation of polycrystalline semiconductor films having a uniform and relatively large crystal grain size. According to the disclosed process, a substrate (for example, an Mo plate) is heated in a furnace at a first deposition temperature (for example, 550.degree. C.), the temperature is then elevated to a second deposition temperature (for example, 620.degree. C.) higher than the first deposition temperature, and a reactant gas is introduced into the furnace while the temperature is elevated or after elevation of the temperature, to form a predetermined second polycrystal film on the substrate. Also in this process, there is adopted a technique in which after the substrate has been heated to a temperature higher than the deposition temperature, a reactant gas containing a substance to be deposited is fed onto the substrate. This laid-open specification does not describe at all that a semiconductor is used as the substrate or the polycrystalline film is used as the source of diffusing impurities into a semiconductor substrate.
From the results of experiments made by us, it was confirmed that when a doped polysemiconductor is grown from the gas phase onto a single crystal semiconductor substrate heated at a predetermined temperature according to the above-mentioned doped polysemiconductor method, at the initial growth stage a doped polysemiconductor is not formed but a doped monosemiconductor is formed. The thickness of this doped monosemiconductor layer is several thousand A at largest, and this thickness is delicately influenced by such factors as the crystal azimuth, the surface cleanness and the polishing condition of the surface and can not be controlled by adjusting these factors. Since a doped monosemiconductor layer formed at the initial stage by diffusion into the semiconductor substrate acts as a part of the single crystal layer having the same conductor type as that of the doped monosemiconductor layer, there is brought about a defect that it is very difficult to control precisely the quantity of impurities in the diffusion layer and the diffusion depth.
Although the doped polysemiconductor method can be applied to the production of a semiconductor device in which the step junction is required, for example, a Zener diode. In this case, however, in addition to the above-mentioned defect, there is caused another fatal defect by formation of the doped monosemiconductor. More specifically, since the speed of direct diffusion of impurities into the single crystal substrate from the polysemiconductor is lower than the speed of diffusion of impurities into the single crystal substrated from or through the monosemiconductor, in a Zener diode in which high step characteristics of the p-n junction are required, a necessary impurity concentration gradient cannot be obtained. Therefore, the resulting Zener fails to have required step characteristics.